The present invention relates to a method for synchronization of a first and at least a second module, each having a clock generator.
In the field of telecommunication and of computer technology, the assemblies of an appliance that are needed for operation can frequently not be disposed on one electronic printed circuit board, but have to be distributed over a plurality of separate modules each having one or more printed circuit boards. In the case of telecommunication systems, in particular, redundant modules are also used for fail-safe reasons. So that the modules operate synchronously, the modules are supplied with a central timing signal, also known as xe2x80x9cclock signalxe2x80x9d. Such a central clock signal is generated by a central clock generator and transmitted to the modules. Provided for the transmission is, for example, a clock channel in a bus to which the modules are connected. The modules operate either directly with the clock signal picked up from the bus or synchronize a separate, local clock generator, present on the respective module, to the central clock signal. In the latter case the local clock generators each generate local clock signals that are slightly phase-shifted in relation to the central clock signal, which shift is due to the transit time of the central clock signal on the bus.
In the case of high-precision appliances operating at high clock frequency, for example in the case of so-called cross connects in the SDH transmission technique (SDH=synchronous digital hierarchy), this phase shift already has an interfering effect on the precision of the appliance. The modules of an appliance then no longer operate with adequate synchronism and, for example, data is overtaken in the messages that the modules exchange with one another via the abovementioned bus.
Even if software modules are to interact under real-time conditions that are managed in each case by separate operating systems each having a local clock generator, a disturbing asynchronism may occur in the distribution of a central clock signal to the respective operating systems as a result of the transit time of the central clock signal.
The object of the invention is therefore to synchronize with high precision modules that each have a local clock generator.
This object is achieved by a method for synchronization of a first and at least a second module, each having a clock generator, the method comprising the steps of
transmitting by the first module, a first clock signal generated by its clock generator to the at least one second module,
synchronizing the clock generator of the at least one second module with the first clock signal,
transmitting by the at least one second module a second clock signal generated by the clock generator that is synchronized with the first clock signal to the first module,
determining by the first module, a (first) time difference value between the first clock signal and the at least one second clock signal, which time difference value is essentially due to the transmission time of the first and the at least one second clock signal between the first, and the at least one second module,
transmitting by the first module, an item of information about the (first) time difference value to the at least one second module and
adjusting the clock generator of the at least one second module on the basis of the information about the (first) time difference value.
In another aspect of the invention, this object is achieved by a (first) module having a first clock generator for synchronization with at least one second module having a second clock generator, comprising
transmitting means for transmitting a first clock signal generated by the first clock generator to the at least one second module
receiving means for receiving at least one second clock signal generated by the respective second clock generator and synchronized with the first clock signal and transmitted by the at least one second module, and
generating means for forming a (first) time difference value between the first clock signal and the at least one second clock signal, which time difference value is essentially due to the transmission time of the first and of the at least one second clock signal between the first, and the at least one second module,
wherein the transmitting means are designed for sending an item of information about the (first) time difference value to the at least one second module.
In another aspect of the invention, this object is achieved by a (second) module having a clock generator for synchronization with at least one first module, comprising
receiving means for receiving a first clock signal sent by the first module,
synchronizing means for synchronizing its clock generator on the basis of the first clock signal, and
transmitting means for sending a second clock signal synchronized with the first clock signal to the first module,
wherein the receiving means are designed for receiving an item of information sent by the first module about a (first) time difference value formed from the first clock signal and the second clock signal, which time difference value is essentially due to the transmission time of the first and of the at least one second clock signal between the first, and the at least one second module, and wherein the synchronizing means are designed for adjusting the clock generator on the basis of the information about the (first) time difference value.
In yet another aspect of the invention, the object is achieved by a master program module for a (first) module having a first clock generator for synchronization with at least one second module having a second clock generator, wherein the master program module contains a program code that can be run by a control means of the first module, the master program module further comprising
transmitting means for sending a first clock signal generated by the first clock generator to the at least one second module,
receiving means for receiving at least one second clock signal generated by the second clock generator that is synchronized with the first clock signal and sent by the at least one second module, and
generating means for forming a (first) time difference value between first clock signal and the at least one second clock signal, which time difference value is essentially due to the transmission time of the first and of the at least one second clock generator between the first, and the at least one second module,
wherein the transmitting means are designed for sending an item of information about the (first) time difference value to the at least one second module.
In yet another aspect of the invention, the object is achieved by a slave program module for a (second) module having a clock generator for synchronization with at least one first module, wherein the slave program module contains a program code that can be run by a control means of the second module, the slave program module further comprising
receiving means for receiving a first clock signal sent by the first module,
synchronizing means for synchronizing the clock generator on the basis of the first clock signal, and
transmitting means for sending a second clock signal synchronized with the first clock signal to the first module,
wherein the receiving means are designed to receive an item of information transmitted by the first module about a (first) time difference value formed from the first clock signal and the second clock signal, which time difference value is essentially due to the transmission time of the first and of the at least one second clock signal between the first, and the at least one second module, and wherein the synchronizing means are designed to adjust the clock generator on the basis of the information about the (first) time difference value.
In yet another aspect of the invention, the object is achieved by a device, in particular a telecommunication device, containing at least one first and at least one second module, each having a clock generator, wherein the at least one first module comprises
transmitting means for transmitting a first clock signal generated by the first clock generator to the at least one second module.
receiving means for receiving at least one second clock signal generated by the respective second clock generator and synchronized with the first clock signal and transmitted by the at least one second module, and
generating means for forming a (first) time difference value between the first clock signal and the at least one second clock signal, which time difference value is essentially due to the transmission time of the first and of the at least one second clock signal between the first and the at least one second module,
wherein the transmitting means are designed for sending an item of information about the (first) time difference value to the at least one second module and wherein the at least one second module comprises
receiving means for receiving a first clock signal sent by the first module,
synchronizing means for synchronizing its clock generator on the basis of the first clock signal, and
transmitting means for sending a second clock signal synchronized with the first clock signal to the first module,
wherein the receiving means are designed for receiving an item of information sent by the first module about a (first) time difference value formed from the first clock signal and the second clock signal, which time difference value is essentially due to the transmission time of the first and of the at least one second clock signal between the first and the at least one second module, and wherein the synchronizing means are designed for adjusting the clock generator on the basis of the information about the (first) time difference value.
In this connection, the invention is based on the idea that a first module, referred to for simplicity as master module transmits a xe2x80x9cmaster clock signalxe2x80x9d generated by its clock generator to a module, referred to below as slave module for simplicity, and possibly to further slave modules. The slave modules then synchronize their respective clock generators to the master clock signal and transmit xe2x80x9cslave clock signalsxe2x80x9d generated by the now synchronized clock generators to the master module. The master module consequently receives a feedback for its synchronization. The master module then determines a time difference value between the master clock signal and the respective slave clock signal. This time difference is essentially due to the signal transit time necessary for the transmission of the master clock signal to the respective slave module and to the signal transit time needed for the transmission of the respective slave clock signal from the respective slave module to the master module. Normally, both signal transit times are equally long because of the symmetrical transmission paths between master module and slave module, with the result that the respective time difference value represents roughly half the signal transit time. The master module then transmits items of information about the respective time difference values to the slave module or slave modules, which adjust their clock generator on the basis of these items of information. The phase differences between master clock signal and the slave clock signals that are due to the respective signal transit times of the master clock signal to the slave modules are consequently reduced to an extent that is no longer troublesome and, under optimum conditions, are completely eliminated, with the result that the master module and the slave modules are optimally synchronized with one another.
Further advantageous refinements of the invention emerge from the dependent claims.
In a preferred embodiment of the invention, either the master module or the slave modules halves/half the respective time difference value to determine the signal transit time and, consequently, the respective phase difference between master clock signal and slave clock signal to be corrected. If equally long signal transit times between master module and slave module are not involved, for example because of different transmission paths, more elaborate algorithms can be used to determine the respective phase difference to be corrected.
The master module may transmit the master clock signal continuously or, alternatively, only at predetermined time instants to the slave modules, for example in a cyclically recurring manner, only once, for example, in connection with a start synchronization procedure, or at irregular intervals, for example in times of low load on the master module and/or on the slave modules.
In a further variant of the invention, the slave modules repeatedly transmit their respective slave clock signals to the master module, with the result that the latter can determine time difference values between the master clock signal and the respective slave clock signal and is thus able to monitor the synchronous operation of the slave modules with the master module. If a slave clock signal of a slave module is asynchronous with the master clock signal, the master module can again send a correction value to the respective slave module to adjust its, respective clock generator.
Expediently, the master module repeatedly transmits the master clock signal to the slave modules again so that the latter are able to determine, in one variant of the invention, time difference values between their respective slave clock signal and the master clock signal. This then results in various possibilities:
The slave modules transmit the respective time difference values to the master module so that the latter can monitor the success of a synchronization procedure or can determine deviations possibly occurring during operation between master clock signal and the respective slave clock signals. The master module can then optionally start the above-described synchronization procedure again to synchronize the slave clock signals.
The slave modules can, however, also adjust their respective clock generators on their own initiative on the basis of the time difference values they have determined.